loop filter造句
例句与造句
- Loop filter proportion coefficient
环路滤波器比例系数 - Video technol . , feb . 1999 , 9 : 156 - 160 . 13 pang k k , tan t k . optimum loop filter in hybrid coders
文章的最后，给出了avs第7部分的解码器和h . 264视频标准的基本部分解码器解码速度和性能的比较。 - The key of the fsk design is the calculation , simulation and optimization of the charge pump pll chip , vco and loop filter
Fsk电路关键是电荷泵pll芯片、 vco电路和环路滤波器的参数计算和仿真优化。 - The paper introduces the phase - locked loop first , including its working theory , the design of the loop filter and noise
本文首先介绍了锁相环。对它的工作原理、环路滤波器的设计以及噪声理论进行了阐述。 - The design method of loop filter is a new breakthrough , and it is one of the emphases in this paper
其中，较大篇幅用于介绍位时钟跟踪环，该环路中环路滤波器的设计方法是一种全新的方法，也是本文的重点之一。 - It's difficult to find loop filter in a sentence. 用loop filter造句挺难的
- In the pll ' s design and debugging , the loop filter ' s design theory and the affect of the loop - bandwidth on the phase noise was focused on
在pll的设计和调试过程中，着重研究了环路滤波器的设计理论和环路带宽对相噪的影响。 - The pll consists of a crystal oscillator , a ring voltage - control - oscillator , a frequency divider , a phase / frequency detector , a charge pump and a loop filter
设计的电路包括20mhz晶体振荡器,鉴频鉴相器,压控振荡器,固定分频器,电荷泵和低通滤波器。 - It is sticking point for optimizing the performance of pll to confirm the parameter of vco ( voltage controlled oscillator ) and properly design the loop filter
确定压控振荡器的各项指标、合理设计环路滤波器是优化环路性能的关键，本文对此作了比较详细的分析。 - Loop filter is the key component to keep frequency synthesizer working steadily and outputting signal of excellent performance . in this paper , author proposes a practical method for loop filter , and verifies its reliability in experiment
环路滤波器是频率合成器能够稳定的工作和输出相位噪声和杂散低的信号的关键，本文给出了环路滤波器具体的计算方法，并通过实验证实了其可靠性。 - At first , it introduces the method of loop parameters , including gain of phase detecting , gain of loop filter and frequency sensitivity , then simulations are done under different structures and parameters . according to the results of simulation , loop structure is decided
在此章中，首先是详细地讨论了环路中各个参数的计算；接着是对各种参数和结构进行了性能仿真，并由此决定了环路的结构。 - This paper presents the general project design firstly , and then introduces the system hardware circuit design in detail which includes the choice of chips , the loop filter parameters computation and the design of the power amplifier ' s peripheral matching circuit
在介绍了系统总体方案设计之后,本文详细介绍了系统的硬件电路设计,包括芯片的选择,环路滤波器参数的设计,以及功率放大器外围匹配电路的设计。 - The motive of this mm frequency synthesizer is also given in this chapter . chapter 2 emphasizes on the pll , first , introduce the module of basic components of pll , such as phase detector , loop filter and the voltage control oscillate ( vco ) . secondly , describe the theory of the linearity pll
第一章介绍了频率综合器(简称频综)的发展过程,对各种频率合成的技术进行了简单的概括和对比,简述了毫米波及其特点,并介绍了本文所作研究工作的研究目的及意义 - This research about the uhf frequency synthesizer mostly includes the following parts : 1 ) the dds modules include the dds ad9852 part , the lc band pass filter design part , the amplifier design part and lc low pass filter part . 2 ) the pll modules include the design of the loop filter which is the core of pll , lc band pass filter design and the amplifier design . 3 ) the controller modules of the system include the part of pc rs - 232 com port communication with the mcu and the part of the process of controller about urat and mcu
本课题的研究主要包括以下几个方面的内容: 1 ) dds模块设计:包括ad9852部分、 lc带通滤波器设计部分、放大器设计部分; 2 ) pll模块设计:包括pll关键部件环路滤波器设计、 rflc带通滤波器设计、末级放大器设计部分; 3 )控制模块设计:包括计算机与单片机串口通信的电路设计部分以及程序设计部分。 - The basic operation principle of phase - locked frequency synthesizer and the type of circuits are expatiated systematicly in this paper . the principle of operation on sampling phase detector and some characteristics including the linear tracking and phase noise in phase loop circuits are analyzed deeply . the research is emphased on the theory and design method of circuits in the sampling phase - locked frequency synthesizer . then , the expansion capturing circuit is analyzed and designed for better performance of capturing loop circuits . at last , the loop filter is also analyzed and contrived taking account of effection of additional phase shift by the sampling - holder . the general research on the theory and technology of sampling phase lock in the paper will make a basement for the development of new product
本文系统的阐述了锁相频率合成器的基本工作原理及电路类型；较深入地分析了取样鉴相工作原理及电路、锁相环路的线性跟踪特性和相位噪声特性；重点对取样锁相频率合成器电路理论和设计方法进行了研究；为了改善环路的捕获性能，对扩捕电路进行了分析和设计，并用wewb32软件对电路进行了仿真；考虑到取样保持器的附加相移影响，对环路滤波器进行了分析和设计。 - The principle and structure of pll ( phase - locked loop ) , including fll and loop filter , are analyzed and described . the module of carrier synchronization in the all - digit ds - qpsk receiver was carried out in the fpga chip . the problem about the estimation and track of the correlative carrier frequency under high dynamic circumstances was resolved very well
针对某遥测遥控全数字接收机的研制,对相干载波同步中的锁相环、锁频环、 dpll 、本地nco等进行了详细的分析和优化设计,在fpga上实现了高动态全数字ds - qpsk接收机中的载波同步模块,解决了大范围和动态多普勒频移下接收机的相干载波提取与跟踪问题。
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